Manual de instrucciones INTEL MICROCONTROLADOR INTEL 8051

[. . . ] MCS@51 MICROCONTROLLER FAMILY USER'S MANUAL ORDER NO. : 272383-002 FEBRUARY 1994 Intel Corporation makes no warrsnfy for the uee of ite products and assumes no responsibility for any ewors which may appear in this document nor does it make a commitment to update the information contained herein. Intel retains the right to make changes to these specifications at any time, without notk Contact your local Intel sales office or your distributor to obtain the latest speoificationa before placing your product order. MDS is an ordering code only and is not usad ae a product name or trademark of Intel Corporation. Intel Corporation and Intel's FASTPATH trademark or products, are not affiliated with Kinetics, a division of Excelan, Inc. [. . . ] L 2 I . 1 1010 Ilr'rl - MOV (I@ + (direct) MOV Rn, #data Bytes: cycles: Encoding: Operation: 0111 lrrr immediatedata MOV (R@ - #dsts 2-53 irrtd. MOV directJl Bytetx Cycle$x Encoding: Operation: M~@-51 PROGRAMMER'SGUIDE AND INSTRUCTION SET 2 1 1111 0101 directaddress MOV (direct) - (A) MOV dire@Rn Bytes: Cyciee: Encoding: Operation: 2 2 1000 Irrr directaddress MOV (direct) + (lb) MOV directjdirect Bytw Cycie= Encoding: Operation: 3 2 I 1000 0101 I dir. addr. (dest) MOV (direct) +- (direct) MOV direct@Ri Bytes: Cycles: Encoding: Operation: 2 2 I 1000 Olli MOV (MM) + (w)) MOV direc$xdats %yte= Cycle= Encoding: Operation: 3 2 0111 0101 directaddress immediatedata I MOV (direct) + #date 2-54 intd. MOV @Ri& Bcycles: Encoding: Operation: MCS@-51PROGRAMMEWSGUIDE AND INSTRUCTION SET . 1 1 1111 Olli MOV (@i)) + (A) MOV @Ri, direct Bytes: Cycles: Encoding: Operation: 2 2 llOIOIOllil I directaddr. I MOV (@i)) + (direct) MOV @Ri, #data Bytes: Cycles: Encoding: Operation: 2 . 1 0111 Olli I immediate data MOV ((RI)) + #data MOV <cleat-bit>, <erc-bit> Function: d Move bitata The Booleanvariableindicatedby the second operand is copiedinto the locationspecitkd by the first operand. One of the operandsmust be the carry flag; the other may be any directly addressablebit. The data present at input Port 3 is 11 OOO1OIB. data The Description: Example: previouslywritten to output Port 1 is 35H (03110101 ). B MOV P1. 3, C MOV C, P3. 3 MOV P1. 2, C will leavethecarryclearedand changePort 1 to 39H (OO111OO1B). 2-55 I I int& MOV C, blt Bytes: Cycles: Enooding: Operstion: M=@-51 PROGRAMMER'S GUIDE AND INSTRUCTION SET 2 1 1o1o 1"0'01 EiEl MOV (~+(bit) MOV bi&C Bytes: Cycles: Enooding: Operstion: . L 2 1001 1"0'01 E MOV (bit) + (C) MOV DPTR, #dsts16 Function: Load Data Pointer with a Id-bit constant The Data Pointer is loaded with the Id-bit constant indicated. The id-bit constant is loaded into the second and third bytes of the instruction. The secondbyte (DPH) is the high-order byte, while the third byte (DPL) holds the low-orderbyte. This is the only instruction whichmovea 16bits of tits at once. Description: Example: The instruction, MOV DPTR, # 1234H willload the value 1234Hinto the Data Pointer: DPH willhold 12Hand DPL will hold 34H. Bytesx Cycles: Encoding: Operation: 3 . dsts15-6 I immed. data7-O MOV (DPTR) ~ #data154 DPH u DPL + #&ltS15. 8u #data73 2-56 intd. MCS@-51PROGRAMMER'SGUIDE AND INSTRUCTION SET MOVC A, @A+<baas-reg> Function: Description: MoveCode byte The MOVCinatmctionsload the Accumulatorwith a oode byte, or constant from program memory. The addressof the byte fetchedis the sum of the originalunsignedeight-bitAccumulator contents and the contents of a sixteen-bitbase register, which may be either the Data Pointer or the PC. In the latter case, the PC is incrementedto the addressof the following instruction before being added with the Accumulator; otherwise the base register is not altered. Sixteen-bitaddition is performed so a carry-out from the low-ordereight bits may propagatethrough higha-order bits. A valuebetweenOand 3 is in the Accumulator. The followinginstructionswill translate the valuein the Accumulatorto one of four valuesdefimed the DB (definebyte) directive. by REL-PC: INC A Example: MOVC A, @A+PC RET DB DB DB DB 66H 77H 88H 99H If the subroutineis called with the Accumulatorequal to OIH, it will return with 77H in the Auxmmlator. The INCA beforethe MOVCinstruction is neededto "get around" the RET instructionabovethe table. If severalbytes of code separated the MOVCfrom the table, the correspondingnumber wouldbe added to the Accumulator instead. MOVC ~@A+ DPTR Bytes: Cycles: Encoding: Operation: 1 2 11001 10011 I MOVC (A) + ((A) + (D~)) MOVC A, @A + Pc Bytes: Cycles: 1 2 1000 0011 Encoding: Operation: MOVC (PC) + (PC) + 1 (A) - ((A) + (PC)) 2-57 int& MOVX MCS@-51PROGRAMMER'SGUIDE AND INSTRUCTION SET <dest-byte>, <sin-byte> Function: Move External Deaoription: data The MOVX instructions transfer data betweenthe Accumulator and a byte of exa memory, hence the "X" appendedto MOV. There are two types of instructions, differingin whetherthey providean eight-bitor sixteen-bitindirect address to the externrddata RAM. In the first typq the contents of ROor R] in the current register bank providean eight-bit address multiplexedwith data on PO. Eight bits are sufficient for external 1/0 expansion decodingor for a relativelysmall RAM array. For somewhatlarger arrays, any output port pins can be used to output higher-orderaddress bits. [. . . ] One differenceis that the 80C51BHis able to turn off its oscillatorunder software control (by writing a 1 to the PD bit in PCON). Another differenceis that in the 80C51BHthe internal clockingcircuitry is driven by the signalat XTAL1, whereasin the HMOSversionsit is by the signalat XTAL2. The feedbackresistor Rfin Figure 33 consistsof paralleledn- and p- channel FETs controlledby the PD bit, such that Rf is opened when PD = 1. The diodeaD1 and D2, which act as clamps to VCC and VSS, are parasitic to the Rf FETs. [. . . ]